V_{BG} (입력):
-10 V
V_{FG} (전위):
-5 V
Q_{net} (알짜):
+5
State: Initial Erased
📄 Reference Paper
Material and Device Structure Designs for 2D Memory Devices Based on the Floating Gate Voltage Trajectory
🔗 Read on ACS Nano (10.1021/acsnano.0c10005)
🔗 Read on ACS Nano (10.1021/acsnano.0c10005)